1. Field of the Invention
The present invention relates to the packaging of integrated circuits and, in particular, to a structure and method for making wirebond connections to microelectronic devices.
2. Description of Related Art
Wirebond connections are made to wiring levels of microelectronic devices in order to electrically connect the circuits of the microelectronic device to a larger connector formed in the package supporting the microelectronic device. With decreasing size of circuitry on microelectronic devices, wirebond balls have likewise diminished in size. With microelectronic device wiring level thickness now being at the level of approximately 500 nm and wire widths in the range of about 300–400 nm, wirebond ball sizes have also decreased. The decrease in wirebond ball size from 70 μm to 50 μm has been difficult because of the aforementioned decrease in metal layer thickness. These 50 μm wirebonds have in some cases been unable to pass stud pull stressing. One solution to this problem, increasing the thickness of the last wiring level to approximately 1 μm, is not desirable because with the wire width in the 200–400 nm size, the aspect ratio and capacitance of this last wiring level would be unacceptably high. Another solution has been to add an additional wiring level whose only function is to allow the use of the 50 μm wirebonds. However this adds significant cost. Accordingly, there is a need in the art for an improved wirebond structure that permits a connection of 50 μm wirebond which passes industry stress tests.